SN74ABT533APWG4

SN74ABT533APWG4
Mfr. #:
SN74ABT533APWG4
설명:
Latches Octal Transp D-Type
수명 주기:
이 제조업체의 새 제품입니다.
데이터 시트:
SN74ABT533APWG4 데이터 시트
배달:
DHL FedEx Ups TNT EMS
지불:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
추가 정보:
SN74ABT533APWG4 추가 정보 SN74ABT533APWG4 Product Details
제품 속성
속성 값
제조사:
텍사스 인스트루먼트
제품 카테고리:
래치
RoHS:
Y
회로 수:
8 Circuit
논리 유형:
D형 투명 래치
논리 제품군:
ABT
극성:
반전
대기 전류:
30 mA
출력 라인 수:
8 Line
높은 수준의 출력 전류:
- 32 mA
저수준 출력 전류:
32 mA
전파 지연 시간:
6.3 ns
공급 전압 - 최대:
5.5 V
공급 전압 - 최소:
4.5 V
최소 작동 온도:
- 40 C
최대 작동 온도:
+ 85 C
패키지/케이스:
TSSOP-20
포장:
튜브
기능:
투명한
키:
1.15 mm
길이:
6.5 mm
출력 유형:
3-State
유형:
D형
너비:
4.4 mm
상표:
텍사스 인스트루먼트
장착 스타일:
SMD/SMT
채널 수:
8 Channel
입력 라인 수:
8 Line
공급 전류 - 최대:
24 mA
작동 공급 전압:
5 V
상품 유형:
래치
재설정 유형:
재설정 없음
공장 팩 수량:
1
하위 카테고리:
논리 IC
단위 무게:
0.002716 oz
Tags
SN74ABT533AP, SN74ABT533A, SN74ABT533, SN74ABT53, SN74ABT5, SN74AB, SN74A, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
*** Stop Electro
Bus Driver, ABT Series, 1-Func, 8-Bit, Inverted Output, BICMOS, PDSO20
***i-Key
IC D-TYPE LATCH SGL 3-ST 20TSSOP
***as Instruments
These octal transparent D-type latches with 3-state outputs are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. When the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the Q\ outputs are latched at the inverse of the levels at the D inputs. A buffered output-enable () input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. does not affect the internal operations of the latches. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT533 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT533A is characterized for operation from -40°C to 85°C.
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유효성
재고:
Available
주문 시:
3000
수량 입력:
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