LTC4315IDE#TRPBF

LTC4315IDE#TRPBF
Mfr. #:
LTC4315IDE#TRPBF
제조사:
Analog Devices Inc.
설명:
Interface - Signal Buffers, Repeaters 2-Wire Bus Buffer with High Noise Margin w/ FAULT and SBDR Disable
수명 주기:
이 제조업체의 새 제품입니다.
데이터 시트:
LTC4315IDE#TRPBF 데이터 시트
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HTML Datasheet:
LTC4315IDE#TRPBF DatasheetLTC4315IDE#TRPBF Datasheet (P4-P6)LTC4315IDE#TRPBF Datasheet (P7-P9)LTC4315IDE#TRPBF Datasheet (P10-P12)LTC4315IDE#TRPBF Datasheet (P13-P15)LTC4315IDE#TRPBF Datasheet (P16-P18)LTC4315IDE#TRPBF Datasheet (P19-P20)
ECAD Model:
추가 정보:
LTC4315IDE#TRPBF 추가 정보 LTC4315IDE#TRPBF Product Details
제품 속성
속성 값
제조사:
아나로그디바이스
제품 카테고리:
인터페이스 - 신호 버퍼, 리피터
RoHS:
Y
장착 스타일:
SMD/SMT
패키지/케이스:
DFN-12
포장:
시리즈:
LTC4315
상표:
아나로그디바이스
상품 유형:
신호 버퍼, 리피터
공장 팩 수량:
2500
하위 카테고리:
인터페이스 IC
Tags
LTC4315I, LTC4315, LTC431, LTC43, LTC4, LTC
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ark
Ms-Bus Buffers 2-Wire Bus Buffer With High Noise Margin W/ Fault And Sbdr Disable
***i-Key
IC ACCELERATOR I2C HOTSWAP 12DFN
***log Devices
The LTC4315 is a hot-swappable 2-wire bus buffer that provides bidirectional buffering, while maintaining a low offset voltage and high noise margin up to 0.3 • VCC. The high noise margin allows the LTC4315 to be interoperable with devices that drive a high VOL (>0.4V) and allows multiple LTC4315s to be cascaded. The LTC4315 supports level translation between 1.5V, 1.8V, 2.5V, 3.3V and 5V busses. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. Connection is established between the input and output after ENABLE is asserted high and a stop bit or bus idle condition has been detected on the SDA and SCL pins. If both data and clock are not simultaneously high at least once in 45ms and DISCEN is high, a FAULT signal is generated indicating a stuck bus low condition and the input is disconnected from the output. Up to 16 clock pulses are subsequently generated to free the stuck bus. A three state ACC pin enables input and output side rise time accelerators of various strengths. Applications Capacitance Buffers/Bus Extender Live Board Insertion Telecommunications Systems Including ATCA Level Translation PMBus Servers
Interface & Isolation ADI SLP
영상 부분 # 설명
LTC4315IMS#TRPBF

Mfr.#: LTC4315IMS#TRPBF

OMO.#: OMO-LTC4315IMS-TRPBF

Interface - Signal Buffers, Repeaters 2-Wire Bus Buffer with High Noise Margin w/ FAULT and SBDR Disable
LTC4315IMS#PBF

Mfr.#: LTC4315IMS#PBF

OMO.#: OMO-LTC4315IMS-PBF

Interface - Signal Buffers, Repeaters 2-Wire Bus Buffer with High Noise Margin w/ FAULT and SBDR Disable
LTC4315IDE#PBF

Mfr.#: LTC4315IDE#PBF

OMO.#: OMO-LTC4315IDE-PBF

Interface - Signal Buffers, Repeaters 2-Wire Bus Buffer with High Noise Margin w/ FAULT and SBDR Disable
LTC4315IDE#TRPBF

Mfr.#: LTC4315IDE#TRPBF

OMO.#: OMO-LTC4315IDE-TRPBF

Interface - Signal Buffers, Repeaters 2-Wire Bus Buffer with High Noise Margin w/ FAULT and SBDR Disable
유효성
재고:
Available
주문 시:
1500
수량 입력:
LTC4315IDE#TRPBF의 현재 가격은 참고용이며 최상의 가격을 원하시면 판매팀 [email protected]으로 문의 또는 다이렉트 이메일을 보내주십시오.
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