AD9697BCPZ-1300

AD9697BCPZ-1300
Mfr. #:
AD9697BCPZ-1300
제조사:
Analog Devices Inc.
설명:
Analog to Digital Converters - ADC Single 14Bit 1.3G SPS/1300MSPS ADC w/JES
수명 주기:
이 제조업체의 새 제품입니다.
데이터 시트:
AD9697BCPZ-1300 데이터 시트
배달:
DHL FedEx Ups TNT EMS
지불:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
추가 정보:
AD9697BCPZ-1300 추가 정보 AD9697BCPZ-1300 Product Details
제품 속성
속성 값
제조사:
아나로그디바이스
제품 카테고리:
아날로그-디지털 변환기 - ADC
RoHS:
Y
시리즈:
AD9250
장착 스타일:
SMD/SMT
패키지/케이스:
LFCSP-48
해결:
14 bit
채널 수:
2 Channel
샘플링 비율:
250 MS/s
입력 유형:
미분
인터페이스 유형:
JESD204B, SPI
건축학:
관로
참조 유형:
내부의
SNR - 신호 대 잡음비:
72.1 dB
최소 작동 온도:
- 40 C
최대 작동 온도:
+ 85 C
포장:
쟁반
키:
0.73 mm
입력 전압:
1.75 Vp-p
길이:
7 mm
변환기 수:
2 Converter
유형:
ADC
너비:
7 mm
상표:
아나로그디바이스
DNL - 미분 비선형성:
+/- 0.75 LSB
이득 오류:
- 6 %FSR/2.5 %FSR
INL - 적분 비선형성:
+/- 3.5 LSB
습기에 민감한:
ADC 입력 수:
2 Input
작동 공급 전압:
1.8 V
상품 유형:
ADC - 아날로그-디지털 변환기
샘플 및 보류:
공장 팩 수량:
260
하위 카테고리:
데이터 컨버터 IC
단위 무게:
0.009171 oz
Tags
AD969, AD96, AD9
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ical
1-Channel Single ADC Pipelined 1.3Gsps 14-bit JESD204B 64-Pin LFCSP EP Tray
***i-Key
IC ADC 14BIT PIPELINED 64LFCSP
***log Devices
The AD9697 is a single, 14-bit, 1300 MSPS analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of direct sampling wide bandwidth analog signals of up to 2 GHz. The −3 dB bandwidth of the ADC input is 2 GHz. The AD9697 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package. The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The analog input and clock signals are differential inputs. The ADC data outputs are internally connected to four digital downconverters (DDCs) through a crossbar mux. Each DDC consists of multiple signal processing stages: a 48-bit frequency translator (numerically controlled oscillator (NCO)), and decimation filters. The NCO has the option to select up to 16 preset bands over the general-purpose input/ output (GPIO) pins, or to use a coherent fast frequency hopping mechanism for band selection. Operation of the AD9697 between the DDC modes is selectable via serial port interface (SPI)programmable profiles. In addition to the DDC blocks, the AD9697 has several functions that simplify the automatic gain control (AGC) function in a communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect control bits in Register 0x0245 of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. In addition to the fast detect outputs, the AD9697 also offers signal monitoring capability. The signal monitoring block provides additional information about the signal being digitized by the ADC. The user can configure the Subclasss 1 JESD204B-based high speed serialized output using either one lane, two lanes, or four lanes, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multidevice synchronization is supported through the SYSREF± and SYNCINB± input pins. The AD9697 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 3-wire SPI and or PDWN/STBY pin. The AD9697 is available in a Pb-free, 64-lead LFCSP and is specified over the −40°C to +105°C junction temperature (TJ) range. This product may be protected by one or more U.S. or international patents. Note that, throughout this data sheet, a multifunction pin, FD/GPIO1, is referred to either by the entire pin name or by a single function of the pin, for example, FD, when only that function is relevant. Product Highlights Low power consumption JESD204B lane rate support up to 16 Gbps Wide, full power bandwidth supports intermediate frequency (IF) sampling of signals up to 2 GHz Buffered inputs ease filter design and implementation Four integrated wideband decimation filters and NCO blocks supporting multiband receivers Programmable fast overrange detection On-chip temperature diode for system thermal management Applications Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE General-purpose software radios Ultrawideband satellite receiver Instrumentation Oscilloscopes Spectrum analyzers Network analyzers Integrated RF test solutions Radars Electronic support measures, electronic counter measures, and electronic counter to counter measures High speed data acquisition systems DOCSIS 3.0 CMTS upstream receive paths Hybrid fiber coaxial digital reverse path receivers Wideband digital predistortion
Analog to Digital Converters ADI SLP
High-Speed Converters
Analog Devices offers the industry's largest portfolio high speeddigital-to-analog converter products including wideband radio frequency(RF), intermediate frequency (IF) signal processing and general purposebaseband classes, which are widely employed in wired and wirelesscommunications, instrumentation, radar, electronic warfare and otherapplications.Learn More
부분 # 제조 설명 재고 가격
AD9697BCPZ-1300
DISTI # V36:1790_21750095
Analog Devices Inc14-Bit, 1300 MSPS, JESD204B, Analog-to-Digital Converter0
  • 1000:$495.5700
  • 500:$495.5800
  • 100:$499.2300
  • 10:$508.7400
  • 1:$510.5400
AD9697BCPZ-1300
DISTI # V99:2348_21750095
Analog Devices Inc14-Bit, 1300 MSPS, JESD204B, Analog-to-Digital Converter0
  • 1:$532.7400
AD9697BCPZ-1300
DISTI # AD9697BCPZ-1300-ND
Analog Devices IncIC ADC 14BIT PIPELINED 64LFCSP
RoHS: Compliant
Min Qty: 1
Container: Tray
30In Stock
  • 1:$571.4800
AD9697BCPZ-1300
DISTI # 584-AD9697BCPZ-1300
Analog Devices IncAnalog to Digital Converters - ADC Single 14Bit 1.3G SPS/1300MSPS ADC w/JES
RoHS: Compliant
0
  • 1:$510.5400
AD9697BCPZRL7-1300
DISTI # 584-9697BCPZRL71300
Analog Devices IncAnalog to Digital Converters - ADC Single 14Bit 1.3G SPS/1300MSPS ADC w/JES
RoHS: Compliant
0
  • 750:$510.5400
영상 부분 # 설명
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OMO.#: OMO-AD8133ACPZ-REEL7

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CY2304SXI-1

Mfr.#: CY2304SXI-1

OMO.#: OMO-CY2304SXI-1

Clock Buffer 3.3V Zero Delay Buffer
AD8133ACPZ-REEL7

Mfr.#: AD8133ACPZ-REEL7

OMO.#: OMO-AD8133ACPZ-REEL7-ANALOG-DEVICES-INC-ADI

Differential Amplifiers Triple Diff Dvr w/output Disable
CY2304SXI-1

Mfr.#: CY2304SXI-1

OMO.#: OMO-CY2304SXI-1-CYPRESS-SEMICONDUCTOR

Clock Buffer 3.3V Zero Delay Buffe
유효성
재고:
Available
주문 시:
4500
수량 입력:
AD9697BCPZ-1300의 현재 가격은 참고용이며 최상의 가격을 원하시면 판매팀 [email protected]으로 문의 또는 다이렉트 이메일을 보내주십시오.
참고 가격(USD)
수량
단가
내선 가격
1
US$510.54
US$510.54
2021년부터 반도체 공급 부족으로 인해 아래 가격은 2021년 이전 정상 가격입니다. 확인을 위해 문의를 보내주세요.
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