OMAPL138EZWT4

Mfr. #:: OMAPL138EZWT4
설명:: Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor
수명 주기:: 이 제조업체의 새 제품입니다.
데이터 시트:: OMAPL138EZWT4 데이터 시트
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추가 정보:: OMAPL138EZWT4 추가 정보 OMAPL138EZWT4 Product Details

제품 속성
속성 값

제조사:: 텍사스 인스트루먼트

제품 카테고리:: 디지털 신호 프로세서 및 컨트롤러 - DSP, DSC

RoHS:: Y

장착 스타일:: SMD/SMT

패키지/케이스:: PBGA-361

시리즈:: OMAP-L138

제품:: DSP

핵심:: TMS320C674x, ARM926EJ-S

최대 클록 주파수:: 456 MHz, 456 MHz

L1 캐시 명령 메모리:: 32 kB, 16 kB

L1 캐시 데이터 메모리:: 32 kB, 16 kB

데이터 RAM 크기:: 8 kB

작동 공급 전압:: 1.3 V

최소 작동 온도:: - 40 C

최대 작동 온도:: + 105 C

포장:: 쟁반

키:: 0.94 mm

길이:: 13 mm

너비:: 13 mm

상표:: 텍사스 인스트루먼트

데이터 ROM 크기:: 64 kB

인터페이스 유형:: I2C, Parallel, SPI, USB

데이터 버스 폭:: 16 bit, 32 bit

입출력 전압:: 1.8 V, 3.3 V

지시 유형:: 고정/부동 소수점

L2 캐시 명령/데이터 메모리:: 256 kB

MFLOPS:: 2746 MFLOPS

습기에 민감한:: 네

코어 수:: 2 Core

타이머/카운터 수:: 3 Timer

프로세서 시리즈:: OMAP

상품 유형:: DSP - 디지털 신호 프로세서 및 컨트롤러

공장 팩 수량:: 90

하위 카테고리:: 임베디드 프로세서 및 컨트롤러

공급 전압 - 최대:: 1.35 V

공급 전압 - 최소:: 1.25 V

상표명:: OMAP

감시 타이머:: 감시 타이머

단위 무게:: 0.027845 oz

Tags: OMAPL138EZW, OMAPL138E, OMAPL138, OMAPL1, OMAPL, OMAP, OMA

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

OMAPL138EZWT4 설명

***ark: Microprocessor-Mpu, Arm+Dsp, 456Mhz, Nfbga-361

***et Europe: DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA

***as Instruments: C674x DSP+Arm Processor - 456MHz 361-NFBGA 0 to 90

*** Source Electronics: IC MPU OMAP-L1X 456MHZ 361NFBGA

***ment14 APAC: MPU, ARM+DSP, 456MHZ, NFBGA-361

***ical: SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA Tray

***p One Stop Global: OMAP-L138 C6000 DSP+ARM PROCESSOR

***AS INSTRUMENTS INC: The OMAP-L138 C6000 DSP+ARM processor is a low-power applications processor based on an ARM926EJ-S and a C674x DSP core. This processor provides significantly lower power than other members of the TMS320C6000™ platform of DSPs.

***AS INSRUMENTS: The device enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices with robust operating systems, rich user interfaces, and high processor performance through the maximum flexibility of a fully integrated, mixed processor solution.

***XS: The dual-core architecture of the device provides benefits of both DSP and reduced instruction set computer (RISC) technologies, incorporating a high-performance TMS320C674x DSP core and an ARM926EJ-S core.

***as Instruments (TI): The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-, 16-, or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously.

***AS INSTRUMENT: The ARM9 core has a coprocessor 15 (CP15), protection module, and data and program memory management units (MMUs) with table look-aside buffers. The ARM9 core has separate 16-KB instruction and 16-KB data caches. Both caches are 4-way associative with virtual index virtual tag (VIVT). The ARM9 core also has 8KB of RAM (Vector Table) and 64KB of ROM.

***AS INS: The device DSP core uses a 2-level cache-based architecture. The level 1 program cache (L1P) is a 32-KB direct mapped cache, and the level 1 data cache (L1D) is a 32-KB 2-way, set-associative cache. The level 2 program cache (L2P) consists of a 256-KB memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. Although the DSP L2 is accessible by the ARM9 and other hosts in the system, an additional 128KB of RAM shared memory is available for use by other hosts without affecting DSP performance.

***AS INSTRUMENTS INCORPORATED: For security-enabled devices, TI’s Basic Secure Boot lets users protect proprietary intellectual property and prevents external entities from modifying user-developed algorithms. By starting from a hardware-based “root-of-trust,” the secure boot flow ensures a known good starting point for code execution. By default, the JTAG port is locked down to prevent emulation and debug attacks; however, the JTAG port can be enabled during the secure boot process during application development. The boot modules are encrypted while sitting in external nonvolatile memory, such as flash or EEPROM, and are decrypted and authenticated when loaded during secure boot. Encryption and decryption protects the users’ IP and lets them securely set up the system and begin device operation with known, trusted code.

***as Instr.: Basic Secure Boot uses either SHA-1 or SHA-256, and AES-128 for boot image validation. Basic Secure Boot also uses AES-128 for boot image encryption. The secure boot flow employs a multilayer encryption scheme which not only protects the boot process but also offers the ability to securely upgrade boot and application software code. A 128-bit device-specific cipher key, known only to the device and generated using a NIST-800-22 certified random number generator, is used to protect user encryption keys. When an update is needed, the customer uses the encryption keys to create a new encrypted image. Then the device can acquire the image through an external interface, such as Ethernet, and overwrite the existing code. For more details on the supported security features or TI’s Basic Secure Boot, see the .

***ASIN: The peripheral set includes: a 10/100 Mbps Ethernet media access controller (EMAC) with a management data input/output (MDIO) module; one USB2.0 OTG interface; one USB1.1 OHCI interface; two I2C Bus interfaces; one multichannel audio serial port (McASP) with 16 serializers and FIFO buffers; two multichannel buffered serial ports (McBSPs) with FIFO buffers; two serial peripheral interfaces (SPIs) with multiple chip selects; a configurable 16-bit host-port interface (HPI); up to 9 banks of general-purpose input/output (GPIO) pins, with each bank containing 16 pins with programmable interrupt and event generation modes, multiplexed with other peripherals; three UART interfaces (each with RTS and CTS); two enhanced high-resolution pulse width modulator (eHRPWM) peripherals; three 32-bit enhanced capture (eCAP) module peripherals which can be configured as 3 capture inputs or 3 APWM outputs; two external memory interfaces: an asynchronous and SDRAM external memory interface (EMIFA) for slower memories or peripherals; and a higher speed DDR2/Mobile DDR controller.

***AS INSTRUMENTS INCORPORATED: The EMAC provides an efficient interface between the device and a network. The EMAC supports both 10Base-T and 100Base-TX, or 10 Mbps and 100 Mbps in either half- or full-duplex mode. Additionally, an MDIO interface is available for PHY configuration. The EMAC supports both MII and RMII interfaces.

***AS INSTRUM: The Serial ATA (SATA) controller provides a high-speed interface to mass data storage devices. The SATA controller supports both SATA I (1.5 Gbps) and SATA II (3.0 Gbps).

***AS INST: The Universal Parallel Port (uPP) provides a high-speed interface to many types of data converters, FPGAs, or other parallel devices. The uPP supports programmable data widths between 8- to 16-bits on both channels. Single-data rate and double-data rate transfers are supported as well as START, ENABLE, and WAIT signals to provide control for a variety of data converters.

***: A video port interface (VPIF) provides a flexible video I/O port.

***XS: The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each peripheral, see the related sections in this document and the associated peripheral reference guides.

***AS INSTRUMENT: The device has a complete set of development tools for the ARM9 and DSP. These tools include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows debugger interface for visibility into source code execution.

OMAPL138EZWT4 추가 정보

Processors: OMO Electronic Processors provide a comprehensive portfolio, proven software, and worldwide support enabling industry-leading automotive and industrial solutions. TI is dedicated to advancing and optimizing today’s processors to meet tomorrow’s intelligence, performance and cost requirements in automotive and industrial applications. Scalable hardware and software platforms with common code allow designers to seamlessly reuse and migrate across devices to protect future investment.

Market price

부분 #	설명	재고	가격
OMAPL138EZWT4 DISTI # V39:1801_07303362	SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA	1	100:$21.1000 10:$24.0799 1:$26.9000
OMAPL138EZWT4 DISTI # 296-39693-ND	IC MPU OMAP-L1X 456MHZ 361NFBGA RoHS: Compliant Min Qty: 1 Container: Tray	4445In Stock	180:$23.9962 90:$26.8379 10:$28.1010 1:$30.4700
OMAPL138EZWT4 DISTI # 30595597	SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA	90	50:$31.2375 5:$33.9150 1:$43.0950
OMAPL138EZWT4 DISTI # 26968154	SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA	35	500:$21.8114 50:$21.9643 35:$22.0651
OMAPL138EZWT4 DISTI # 29727162	SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA	1	10:$24.0300 1:$27.0300
OMAPL138EZWT4 DISTI # OMAPL138EZWT4	DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA - Trays (Alt: OMAPL138EZWT4) RoHS: Compliant Min Qty: 1 Container: Tray	Americas - 220	1:$23.9900 10:$21.8900 25:$21.8900 50:$21.7900 100:$21.7900 500:$21.0900 1000:$21.0900
OMAPL138EZWT4 DISTI # OMAPL138EZWT4	DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA (Alt: OMAPL138EZWT4) RoHS: Compliant Min Qty: 90	Asia - 0
OMAPL138EZWT4	C6000 DSP+ARM Processor	1772	1000:$17.9400 750:$18.0000 500:$20.0500 250:$21.3100 100:$21.4700 25:$24.1500 10:$24.9400 1:$26.6800
OMAPL138EZWT4 DISTI # 595-OMAPL138EZWT4	Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor RoHS: Compliant	177	1:$30.4700 5:$29.2100 10:$28.1100 25:$26.8400 100:$24.0000 250:$22.9000
OMAPL138EZWT4 DISTI # C1S746203694933	OMAP-L138 C6000 DSP+ARM PROCESSOR	90	50:$24.5000 5:$26.6000 1:$33.8000

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OMAPL138EZWT4

Step1:Vacuum Packaging with PL

Step2:Anti-Static Bag

Step3:Packaging Boxes

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes