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OMAPL138EZCE3

OMAPL138EZCE3
Mfr. #:
OMAPL138EZCE3
설명:
Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor
수명 주기:
이 제조업체의 새 제품입니다.
데이터 시트:
OMAPL138EZCE3 데이터 시트
배달:
DHL FedEx Ups TNT EMS
지불:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
추가 정보:
OMAPL138EZCE3 추가 정보 OMAPL138EZCE3 Product Details
제품 속성
속성 값
제조사:
텍사스 인스트루먼트
제품 카테고리:
디지털 신호 프로세서 및 컨트롤러 - DSP, DSC
RoHS:
Y
장착 스타일:
SMD/SMT
패키지/케이스:
PBGA-361
시리즈:
OMAP-L138
제품:
DSP
핵심:
TMS320C674x, ARM926EJ-S
최대 클록 주파수:
375 MHz, 375 MHz
L1 캐시 명령 메모리:
32 kB, 16 kB
L1 캐시 데이터 메모리:
32 kB, 16 kB
데이터 RAM 크기:
8 kB
작동 공급 전압:
1.2 V
최소 작동 온도:
- 40 C
최대 작동 온도:
+ 105 C
포장:
쟁반
키:
0.94 mm
길이:
13 mm
너비:
13 mm
상표:
텍사스 인스트루먼트
데이터 ROM 크기:
64 kB
인터페이스 유형:
I2C, Parallel, SPI, USB
데이터 버스 폭:
16 bit, 32 bit
입출력 전압:
1.8 V, 3.3 V
지시 유형:
고정/부동 소수점
L2 캐시 명령/데이터 메모리:
256 kB
MFLOPS:
2746 MFLOPS
습기에 민감한:
네
코어 수:
2 Core
타이머/카운터 수:
3 Timer
프로세서 시리즈:
OMAP
상품 유형:
DSP - 디지털 신호 프로세서 및 컨트롤러
공장 팩 수량:
160
하위 카테고리:
임베디드 프로세서 및 컨트롤러
공급 전압 - 최대:
1.32 V
공급 전압 - 최소:
1.14 V
상표명:
OMAP
감시 타이머:
감시 타이머
단위 무게:
0.027845 oz
Tags
OMAPL138EZC, OMAPL138E, OMAPL138, OMAPL1, OMAPL, OMAP, OMA
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***et Europe
DSP Fixed-Point/Floating-Point 32-Bit 375MHz 3648MIPS 361-Pin NFBGA
***as Instruments
C674x DSP+Arm Processor - 456MHz 361-NFBGA 0 to 90
***nell
MPU, 32BIT, ARM9, 375MHZ, NFBGA-361
***i-Key
IC MPU OMAP-L1X 375MHZ 361NFBGA
***ical
SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA Tray
***ment14 APAC
DSP, 32BIT, 300MHZ, NFBGA-361
***p One Stop Japan
OMAP-L138 C6000 DSP+ARM PROCESSOR
***ark
Omapl138ezce3 Freon 2.3
***AS INSTR
The OMAP-L138 C6000 DSP+ARM processor is a low-power applications processor based on an ARM926EJ-S and a C674x DSP core. This processor provides significantly lower power than other members of the TMS320C6000™ platform of DSPs.
***ASIN
The device enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices with robust operating systems, rich user interfaces, and high processor performance through the maximum flexibility of a fully integrated, mixed processor solution.
***AS INSTRU
The dual-core architecture of the device provides benefits of both DSP and reduced instruction set computer (RISC) technologies, incorporating a high-performance TMS320C674x DSP core and an ARM926EJ-S core.
***AS INSTRU
The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-, 16-, or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously.
***
The ARM9 core has a coprocessor 15 (CP15), protection module, and data and program memory management units (MMUs) with table look-aside buffers. The ARM9 core has separate 16-KB instruction and 16-KB data caches. Both caches are 4-way associative with virtual index virtual tag (VIVT). The ARM9 core also has 8KB of RAM (Vector Table) and 64KB of ROM.
***AS INSTRUM
The device DSP core uses a 2-level cache-based architecture. The level 1 program cache (L1P) is a 32-KB direct mapped cache, and the level 1 data cache (L1D) is a 32-KB 2-way, set-associative cache. The level 2 program cache (L2P) consists of a 256-KB memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. Although the DSP L2 is accessible by the ARM9 and other hosts in the system, an additional 128KB of RAM shared memory is available for use by other hosts without affecting DSP performance.
***AS INSTRUMENTS INC
For security-enabled devices, TI’s Basic Secure Boot lets users protect proprietary intellectual property and prevents external entities from modifying user-developed algorithms. By starting from a hardware-based “root-of-trust,” the secure boot flow ensures a known good starting point for code execution. By default, the JTAG port is locked down to prevent emulation and debug attacks; however, the JTAG port can be enabled during the secure boot process during application development. The boot modules are encrypted while sitting in external nonvolatile memory, such as flash or EEPROM, and are decrypted and authenticated when loaded during secure boot. Encryption and decryption protects the users’ IP and lets them securely set up the system and begin device operation with known, trusted code.
***INS
Basic Secure Boot uses either SHA-1 or SHA-256, and AES-128 for boot image validation. Basic Secure Boot also uses AES-128 for boot image encryption. The secure boot flow employs a multilayer encryption scheme which not only protects the boot process but also offers the ability to securely upgrade boot and application software code. A 128-bit device-specific cipher key, known only to the device and generated using a NIST-800-22 certified random number generator, is used to protect user encryption keys. When an update is needed, the customer uses the encryption keys to create a new encrypted image. Then the device can acquire the image through an external interface, such as Ethernet, and overwrite the existing code. For more details on the supported security features or TI’s Basic Secure Boot, see the .
***ASIN
The peripheral set includes: a 10/100 Mbps Ethernet media access controller (EMAC) with a management data input/output (MDIO) module; one USB2.0 OTG interface; one USB1.1 OHCI interface; two I2C Bus interfaces; one multichannel audio serial port (McASP) with 16 serializers and FIFO buffers; two multichannel buffered serial ports (McBSPs) with FIFO buffers; two serial peripheral interfaces (SPIs) with multiple chip selects; a configurable 16-bit host-port interface (HPI); up to 9 banks of general-purpose input/output (GPIO) pins, with each bank containing 16 pins with programmable interrupt and event generation modes, multiplexed with other peripherals; three UART interfaces (each with RTS and CTS); two enhanced high-resolution pulse width modulator (eHRPWM) peripherals; three 32-bit enhanced capture (eCAP) module peripherals which can be configured as 3 capture inputs or 3 APWM outputs; two external memory interfaces: an asynchronous and SDRAM external memory interface (EMIFA) for slower memories or peripherals; and a higher speed DDR2/Mobile DDR controller.
***AS INSTRUM
The EMAC provides an efficient interface between the device and a network. The EMAC supports both 10Base-T and 100Base-TX, or 10 Mbps and 100 Mbps in either half- or full-duplex mode. Additionally, an MDIO interface is available for PHY configuration. The EMAC supports both MII and RMII interfaces.
***XS
The Serial ATA (SATA) controller provides a high-speed interface to mass data storage devices. The SATA controller supports both SATA I (1.5 Gbps) and SATA II (3.0 Gbps).
***AS INSTRUMENTS INC
The Universal Parallel Port (uPP) provides a high-speed interface to many types of data converters, FPGAs, or other parallel devices. The uPP supports programmable data widths between 8- to 16-bits on both channels. Single-data rate and double-data rate transfers are supported as well as START, ENABLE, and WAIT signals to provide control for a variety of data converters.
***NS
A video port interface (VPIF) provides a flexible video I/O port.
***
The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each peripheral, see the related sections in this document and the associated peripheral reference guides.
***AS USD
The device has a complete set of development tools for the ARM9 and DSP. These tools include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows debugger interface for visibility into source code execution.
Processors
OMO Electronic Processors provide a comprehensive portfolio, proven software, and worldwide support enabling industry-leading automotive and industrial solutions. TI is dedicated to advancing and optimizing today’s processors to meet tomorrow’s intelligence, performance and cost requirements in automotive and industrial applications. Scalable hardware and software platforms with common code allow designers to seamlessly reuse and migrate across devices to protect future investment.
부분 # 설명 재고 가격
OMAPL138EZCE3
DISTI # V39:1801_07303354		SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA
RoHS: Compliant		240
  • 500:$16.9500
  • 100:$18.5700
  • 10:$21.3800
  • 1:$23.0799
OMAPL138EZCE3
DISTI # 296-42787-ND		IC MPU OMAP-L1X 375MHZ 361NFBGA
RoHS: Compliant
Min Qty: 1
Container: Tray		1486In Stock
  • 160:$19.9971
  • 25:$22.3652
  • 10:$23.4180
  • 1:$25.3900
OMAPL138EZCE3
DISTI # 30660279		SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA
RoHS: Compliant		240
  • 100:$18.5700
  • 10:$21.3800
  • 1:$23.0798
OMAPL138EZCE3
DISTI # OMAPL138EZCE3		DSP Fixed-Point/Floating-Point 32-Bit 375MHz 3648MIPS 361-Pin NFBGA - Trays (Alt: OMAPL138EZCE3)
RoHS: Compliant
Min Qty: 160
Container: Tray		Americas - 0
  • 160:$21.8900
  • 320:$21.3900
  • 640:$20.4900
  • 960:$19.9900
  • 1600:$19.6900
OMAPL138EZCE3
DISTI # OMAPL138EZCE3		DSP Fixed-Point/Floating-Point 32-Bit 375MHz 3648MIPS 361-Pin NFBGA (Alt: OMAPL138EZCE3)
RoHS: Compliant
Min Qty: 160		Asia - 0
    OMAPL138EZCE3C6000 DSP+ARM Processor2144
    • 1000:$14.9500
    • 750:$15.0000
    • 500:$16.7100
    • 250:$18.1600
    • 100:$19.0800
    • 25:$21.8400
    • 10:$22.6300
    • 1:$24.3400
    OMAPL138EZCE3
    DISTI # 595-OMAPL138EZCE3    		Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor
    RoHS: Compliant    		129
    • 1:$25.3900
    • 5:$24.3500
    • 10:$23.4200
    • 25:$22.3700
    • 100:$20.0000
    • 250:$19.0800
    OMAPL138EZCE3
    DISTI # C1S746203694854    		OMAP-L138 C6000 DSP+ARM PROCESSOR
    RoHS: Compliant    		240
    • 100:$18.5700
    • 10:$21.3800
    • 1:$23.0798
    영상 부분 # 설명
    OPA2134PA

    Mfr.#: OPA2134PA

    OMO.#: OMO-OPA2134PA

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    Mfr.#: DSD1791DB

    OMO.#: OMO-DSD1791DB

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    TLK100PHP

    Mfr.#: TLK100PHP

    OMO.#: OMO-TLK100PHP

    		 Ethernet ICs Industrl Ethrnet PHY
    TRS232ECDR

    Mfr.#: TRS232ECDR

    OMO.#: OMO-TRS232ECDR

    		 RS-232 Interface IC Dual RS232 Drvr/Rcvr
    TMDSLCDK138

    Mfr.#: TMDSLCDK138

    OMO.#: OMO-TMDSLCDK138

    		 Video IC Development Tools Freon EVM
    TMDSEMU560V2STM-UE

    Mfr.#: TMDSEMU560V2STM-UE

    OMO.#: OMO-TMDSEMU560V2STM-UE

    		 Emulators / Simulators XDS560 Class High Speed Emulators
    TMDSEMU200-U

    Mfr.#: TMDSEMU200-U

    OMO.#: OMO-TMDSEMU200-U-TEXAS-INSTRUMENTS

    		 XDS200 USB JTAG EMULATOR
    TMDSEMU560V2STM-U

    Mfr.#: TMDSEMU560V2STM-U

    OMO.#: OMO-TMDSEMU560V2STM-U-TEXAS-INSTRUMENTS

    		 EMULATOR TRACE SYSTEM USB
    TMDSEMU560V2STM-UE

    Mfr.#: TMDSEMU560V2STM-UE

    OMO.#: OMO-TMDSEMU560V2STM-UE-TEXAS-INSTRUMENTS

    		 EMULATOR TRACE SYSTEM XDS560
    TMDSLCDK138

    Mfr.#: TMDSLCDK138

    OMO.#: OMO-TMDSLCDK138-TEXAS-INSTRUMENTS

    		 OMAP-L138 EVAL BRD
    유효성
    재고:
    129
    주문 시:
    2112
    수량 입력:
    OMAPL138EZCE3의 현재 가격은 참고용이며 최상의 가격을 원하시면 판매팀 [email protected]으로 문의 또는 다이렉트 이메일을 보내주십시오.
    참고 가격(USD)
    수량
    단가
    내선 가격
    1
    US$25.39
    US$25.39
    5
    US$24.35
    US$121.75
    10
    US$23.42
    US$234.20
    25
    US$22.37
    US$559.25
    100
    US$20.00
    US$2 000.00
    250
    US$19.08
    US$4 770.00
    500
    US$18.16
    US$9 080.00
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