SN74LVC823ADWRE4

SN74LVC823ADWRE4
Mfr. #:
SN74LVC823ADWRE4
설명:
Flip Flops 9-Bit Bus Intfc FlipFlop W/3-St Otpt
수명 주기:
이 제조업체의 새 제품입니다.
데이터 시트:
SN74LVC823ADWRE4 데이터 시트
배달:
DHL FedEx Ups TNT EMS
지불:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
추가 정보:
SN74LVC823ADWRE4 추가 정보 SN74LVC823ADWRE4 Product Details
제품 속성
속성 값
제조사:
텍사스 인스트루먼트
제품 카테고리:
플립플롭
RoHS:
Y
회로 수:
1
논리 제품군:
74LV
논리 유형:
버스 인터페이스 플립플롭
극성:
비 반전
입력 유형:
단일 종단
출력 유형:
단일 종단
전파 지연 시간:
8.9 ns
높은 수준의 출력 전류:
- 24 mA
저수준 출력 전류:
24 mA
공급 전압 - 최소:
1.65 V
공급 전압 - 최대:
3.6 V
최소 작동 온도:
- 40 C
최대 작동 온도:
+ 85 C
장착 스타일:
SMD/SMT
패키지/케이스:
SOIC-24
포장:
기능:
D형 버스 인터페이스
키:
2.35 mm
길이:
15.4 mm
대기 전류:
10 uA
너비:
7.52 mm
상표:
텍사스 인스트루먼트
채널 수:
9
입력 라인 수:
9
출력 라인 수:
3
작동 공급 전압:
1.65 V to 3.6 V
상품 유형:
플립플롭
재설정 유형:
마스터 리셋
공장 팩 수량:
1
하위 카테고리:
논리 IC
단위 무게:
0.038731 oz
Tags
SN74LVC823ADWR, SN74LVC823ADW, SN74LVC823AD, SN74LVC823, SN74LVC82, SN74LVC8, SN74LVC, SN74LV, SN74L, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE POS TRG SNGL 24SOIC
***eco
9-BIT BUS INTERFACE FF W/3-S, CLR
***as Instruments
This 9-bit bus-interface flip-flop is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC823A is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. With the clock-enable (CLKEN)\ input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN\ high disables the clock buffer, latching the outputs. This device has noninverting data (D) inputs. Taking the clear (CLR)\ input low causes the nine Q outputs to go low, independently of the clock. A buffered output-enable (OE)\ input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or the high-impedance state. OE\ does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
부분 # 설명 재고 가격
SN74LVC823ADWRE4
DISTI # SN74LVC823ADWRE4-ND
IC FF D-TYPE SNGL 9BIT 20SOIC
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74LVC823ADWRE4
    DISTI # 595-SN74LVC823ADWRE4
    Flip Flops 9-Bit Bus Intfc FlipFlop W/3-St Otpt
    RoHS: Compliant
    0
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      신규 및 오리지널
      유효성
      재고:
      Available
      주문 시:
      2500
      수량 입력:
      SN74LVC823ADWRE4의 현재 가격은 참고용이며 최상의 가격을 원하시면 판매팀 [email protected]으로 문의 또는 다이렉트 이메일을 보내주십시오.
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