CAVCH4T245MRSVREP

CAVCH4T245MRSVREP
Mfr. #:
CAVCH4T245MRSVREP
설명:
Translation - Voltage Levels EP 4B Dual-Sply Bus Transc
수명 주기:
이 제조업체의 새 제품입니다.
데이터 시트:
CAVCH4T245MRSVREP 데이터 시트
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추가 정보:
CAVCH4T245MRSVREP 추가 정보 CAVCH4T245MRSVREP Product Details
제품 속성
속성 값
제조사:
텍사스 인스트루먼트
제품 카테고리:
번역 - 전압 레벨
RoHS:
Y
전파 지연 시간:
6.9 ns
공급 전압 - 최대:
3.6 V
공급 전압 - 최소:
1.2 V
최소 작동 온도:
- 55 C
최대 작동 온도:
+ 125 C
장착 스타일:
SMD/SMT
패키지/케이스:
UQFN-16
포장:
데이터 속도:
380 Mb/s
특징:
부분 전원 차단(Ioff), 과전압 허용 입력, 버스 홀드
작동 온도 범위:
- 55 C to + 125 C
출력 유형:
3-State
시리즈:
SN74AVCH4T245-EP
상표:
텍사스 인스트루먼트
논리 제품군:
AVC
논리 유형:
CMOS
높은 수준의 출력 전류:
12 mA
저수준 출력 전류:
12 mA
상품 유형:
번역 - 전압 레벨
공장 팩 수량:
3000
하위 카테고리:
논리 IC
부품 번호 별칭:
V62/09618-01XE
단위 무게:
0.001443 oz
Tags
CAVC, CAV
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***AS INSTRUMENT
This 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. The SN74AVCH4T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
***TEXAS
The SN74AVCH4T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
***AS INSTUMENTS
The SN74AVCH4T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.
***
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
***AS INS
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.
***AS INTRUMENTS
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
***AS
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
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유효성
재고:
Available
주문 시:
1987
수량 입력:
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참고 가격(USD)
수량
단가
내선 가격
1
US$2.70
US$2.70
10
US$2.43
US$24.30
100
US$1.98
US$198.00
500
US$1.70
US$850.00
1000
US$1.43
US$1 430.00
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