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SN74ACT3641-30PQ

SN74ACT3641-30PQ
Mfr. #:
SN74ACT3641-30PQ
설명:
FIFO 1024 x 36 synch FIFO Memory
수명 주기:
이 제조업체의 새 제품입니다.
데이터 시트:
SN74ACT3641-30PQ 데이터 시트
배달:
DHL FedEx Ups TNT EMS
지불:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
추가 정보:
SN74ACT3641-30PQ 추가 정보 SN74ACT3641-30PQ Product Details
제품 속성
속성 값
제조사:
텍사스 인스트루먼트
제품 카테고리:
선입선출
RoHS:
Y
데이터 버스 폭:
36 bit
버스 방향:
양방향
메모리 크기:
36 kbit
타이밍 유형:
동기
조직:
1 k x 36
회로 수:
2
최대 클록 주파수:
33.4 MHz
액세스 시간:
15 ns
공급 전압 - 최대:
5.5 V
공급 전압 - 최소:
4.5 V
공급 전류 - 최대:
0.4 mA
최소 작동 온도:
0 C
최대 작동 온도:
+ 70 C
패키지/케이스:
BQFP-132
포장:
튜브
키:
3.56 mm
너비:
24.13 mm
상표:
텍사스 인스트루먼트
장착 스타일:
SMD/SMT
습기에 민감한:
네
작동 공급 전압:
5 V
상품 유형:
선입선출
공장 팩 수량:
1
하위 카테고리:
메모리 및 데이터 저장
단위 무게:
0.162567 oz
Tags
SN74ACT364, SN74ACT36, SN74ACT3, SN74ACT, SN74AC, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***et
FIFO Mem Sync Dual Depth Bi-Dir 1K x 36 132-Pin BQFP Tray
***i-Key
IC CLOCKED FIFO MEMORY 132-QFP
***as Instruments
The SN74ACT3641 is a high-speed, low-power, CMOS clocked FIFO memory. It supports clock frequencies up to 67 MHz and has read access times as fast as 12 ns. The 1024 36 dual-port SRAM FIFO buffers data from port A to port B. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. The FIFO has flags to indicate empty and full conditions and two programmable flags (almost full and almost empty) to indicate when a selected number of words is stored in memory. Communication between each port takes place with two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. Two or more devices are used in parallel to create wider datapaths. Expansion is also possible in word depth. The SN74ACT3641 is a clocked FIFO, which means each port employs a synchronous interface. All data transfers through a port are gated to the low-to-high transition of a continuous (free-running) port clock by enable signals. The continuous clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple interface between microprocessors and/or buses with synchronous control. The input-ready (IR) flag and almost-full (AF\) flag of the FIFO are two-stage synchronized to CLKA. The output-ready (OR) flag and almost-empty (AE\) flag of the FIFO are two-stage synchronized to CLKB. Offset values for the AF\ and AE\ flags of the FIFO can be programmed from port A or through a serial input. The SN74ACT3641 is characterized for operation from 0C to 70C. For more information on this device family, see the following application reports: FIFO Patented Synchronous Retransmit: Programmable DSP-Interface Application for FIR Filtering (literature number SCAA009) FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control (literature number SCAA007) Metastability Performance of Clocked FIFOs (literature number SCZA004)
부분 # 설명 재고 가격
SN74ACT3641-30PQ
DISTI # 296-4413-ND		IC CLOCKED FIFO MEMORY 132-QFP
RoHS: Compliant
Min Qty: 36
Container: Tray		Limited Supply - Call
    SN74ACT3641-30PQ
    DISTI # 595-SN74ACT3641-30PQ    		FIFO 1024 x 36 synch FIFO Memory
    RoHS: Compliant    		0
      SN74ACT3641-30PQBi-Directional FIFO, 1KX36, 15ns, Synchronous, CMOS, PQFP132
      RoHS: Compliant      		278
      • 1000:$25.4100
      • 500:$26.7500
      • 100:$27.8400
      • 25:$29.0400
      • 1:$31.2700
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      유효성
      재고:
      Available
      주문 시:
      1000
      수량 입력:
      SN74ACT3641-30PQ의 현재 가격은 참고용이며 최상의 가격을 원하시면 판매팀 [email protected]으로 문의 또는 다이렉트 이메일을 보내주십시오.
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